International Journal of VLSI Design (IJVD)

The International Journal of VLSI Design (IJVD) by IAEME Publication is dedicated to advancing the field of Very Large Scale Integration (VLSI). The primary aim is to be a leading platform for disseminating cutting-edge research, theories, and practical applications within VLSI design, Electronic Design Automation (EDA) tools, system design and analysis, rapid prototyping, simulation, testing, and verification. Encompassing Domains: IJVD's scope encompasses a diverse range of topics within VLSI Design. Emphasizing both theoretical developments and practical applications, the journal covers areas such as CMOS technologies, analog and digital integrated circuits, high-level synthesis, hardware security, embedded systems, low-power design, and emerging trends in VLSI technology. Rigorous Evaluation Process: The journal maintains a stringent peer-review process, ensuring that only high-quality, original research papers, reviews, and reports are published. Stringent standards are upheld to ascertain the quality and originality of the contributions. Facilitating Collaborative Innovation: IJVD serves as a platform for fostering collaboration among academia, industry professionals, and scholars. It aims to encourage engagement and knowledge exchange, catalyzing innovation and progression in VLSI technology. The journal's objective is to nurture a dynamic environment that encourages collaboration and contributes to the evolution of the VLSI landscape. Authors are invited to contribute to our journal by submitting articles showcasing research findings, project outcomes, comprehensive surveys, and industry insights that highlight notable advancements in VLSI design and Communications. We encourage submissions that contribute novel perspectives, innovative solutions, and significant developments in these fields to further enrich the knowledge base of our readership

International Journal of VLSI Design (IJVD) is :-

• International, Peer-Reviewed, Open Access, Refereed, Encompassing Domains, Rigorous Evaluation Process, VLSI, Computer-Aided Design (CAD), Post-CMOS VLSI, High-Level Synthesis (HLS), System-on-Chip (SoC), SPICE Models , Online , Monthly Journal

• UGC Approved, ISSN Approved: P-ISSN E-ISSN: 1711-1450, Established: 2024,
• Provides Crossref DOI

• Not indexed in Scopus, WoS, DOAJ, PubMed, UGC CARE