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Abstract
The increasing complexity and heterogeneity of semiconductor Intellectual Property (IP) blocks necessitate efficient and adaptable test generation strategies. This paper introduces a meta-learning-based framework designed to facilitate transferable test generation across a diverse range of semiconductor IPs. By leveraging meta-learning, the proposed method rapidly adapts to new IP blocks with minimal retraining, significantly reducing test development time and resources. The framework utilizes few-shot learning principles to generalize across varying architectures, processes, and functionalities, ensuring robust coverage even in highly heterogeneous environments. Experimental evaluations demonstrate the framework's superior performance compared to traditional test generation methods, particularly in terms of adaptability, efficiency, and fault detection capability. This work lays a foundation for scalable and transferable test methodologies in the evolving semiconductor landscape, ultimately accelerating the verification cycle and improving overall reliability.
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