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Research Article
January, 1970
66b5f718a936efc00cb6d3f4
A High-Performance VLSI Architecture for Image Compression Technique Using 2-D DWT
SURESH BABU
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https://scholar9.com/publication-detail/a-highperformance-vlsi-architecture-for-image-com-14601
Details
Volume
2
Issue
6
Pages
1002-1006
Cite this publication
SURESH BABU "A High-Performance VLSI Architecture for Image Compression Technique Using 2-D DWT". 66b5f718a936efc00cb6d3f4, vol: 2, No. 6 Jan. 1970, pp: 1002-1006, https://scholar9.com/publication-detail/a-highperformance-vlsi-architecture-for-image-com-14601
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