J.E.N. Abhilash

Associate Professor at Swarnandhra College of Engg & Tech,Narsapur

Narsapur, Andhra Pradesh, India

Mutual Connections

Scholar9 ID | S9-082024-0903341

Swarnandhra College of Engg & Tech,Narsapur

J.N.T.U.University Campus,Kakinada

Send Message

Subject *

Description *

Files (Max 5MB) No file chosen

Edit Profile

CHANGE PICTURE

Prefix

First Name *

Last Name *

Email Address *

Mobile *

+91

Profile Title

Education Category

Address

Country *

State *

City *

Zip Code

Crop Profile Picture

New Email Address*

Verification code sent to:

Verification Code*

8 Publications

0 Followers

0 Following

0 Questions

👤 About

Seeking a challenging environment where in I can use my acquired knowledge and learning skills leading to an overall professional growth.

Skills & Expertise

C Language VHDL Verilog P-Spice H-Spice Mentor Graphics TASM Matlab Embedded C Embedded Systems Micro Wind Tool

Research Interests

Adaptability Fast Learning Ability Hard working

Connect With Me

No social links added yet.

About Me / Bio *

Write a brief introduction about yourself (minimum 50 characters)

Skills & Expertise

Enter skills...

Type and press Enter, or paste comma-separated skills

Research Interests

Search and select research interests

Social Links (Optional)

🔗 GitHub URL

🎓 Google Scholar URL

🔬 ORCID URL

💼 LinkedIn URL

📺 YouTube URL

🏢 Employee URL

💼 Experience

Associate Professor

Swarnandhra College of Engg & Tech,Narsapur · January 2004 - Present

10 years of Teaching Experience in ECE Department

Job Title / Designation *

Organization *

Start Date *

End Date *

Current

Description

Job Title / Designation *

Organization *

Start Date *

End Date *

Current

Description

📢 Share this with your network Create a post to share this new experience with your professional network

Note: Post creation is only available for experiences starting within the last 3 months.

🎓 Education

J.N.T.U.University Campus,Kakinada

M.Tech in Instrumentation & Control Systems · 2008

Institution *

Degree *

Field of Study

Grade

Passout Year *

Pursuing

Description

Sri Saradhi Institiute of Engineering and Technology, Nuzivedu

B.Tech in Electronics and Communication Engineering · 2004

Institution *

Degree *

Field of Study

Grade

Passout Year *

Pursuing

Description

SVSR& MM Junior College, Vijayawada

Intermediate in M.P.C · 1999

Institution *

Degree *

Field of Study

Grade

Passout Year *

Pursuing

Description

DAV Public School Kondapalli,Vijayawada

S.S.C in null · 1997

Institution *

Degree *

Field of Study

Grade

Passout Year *

Pursuing

Description

Mewar University

Ph.D in null · null

Institution *

Degree *

Field of Study

Grade

Passout Year *

Pursuing

Description

Institution *

Degree *

Field of Study

Grade

Passout Year *

Pursuing

Description

Add New Journal

Journal Name *

e-ISSN

p-ISSN

* At least one ISSN (e-ISSN or p-ISSN) is required

📚 Publications (8)

Implementation of Fully-Pipelined 16-Point DHT Architecture Using 8-Point & 4-Point DHTs for FPGA Realization

Journal: International Journal of Advanced Research in Computer Engineering & Technology • November 2012

null

DOI (Optional)

Title *

URL

Article Type *

Authors

Venue/Journal *

Publication Date *

Citations

Volume

Issue

Page No

Upload Research Paper (PDF only)

Max size: 10MB

Keywords/Tags (Optional)

Enter keywords...

Type and press Enter, or paste comma-separated keywords

Abstract/Description

Similitude Of Multipliers Using VHDL

Journal: International Conference On Nanoscience , Engineering & Advanced Computing (ICNEAC-201I) • July 2011

null

DOI (Optional)

Title *

URL

Article Type *

Authors

Venue/Journal *

Publication Date *

Citations

Volume

Issue

Page No

Upload Research Paper (PDF only)

Max size: 10MB

Keywords/Tags (Optional)

Enter keywords...

Type and press Enter, or paste comma-separated keywords

Abstract/Description

Design and Analysis Of 1D Photonic Crystals For its Applications

Journal: International Conference On Nanoscience , Engineering & Advanced Computing (ICNEAC-201I) • July 2011

null

DOI (Optional)

Title *

URL

Article Type *

Authors

Venue/Journal *

Publication Date *

Citations

Volume

Issue

Page No

Upload Research Paper (PDF only)

Max size: 10MB

Keywords/Tags (Optional)

Enter keywords...

Type and press Enter, or paste comma-separated keywords

Abstract/Description

FPGA Implementation of Blow Fish Cryptosystem Using VHDL

Journal: • January 2013

null

DOI (Optional)

Title *

URL

Article Type *

Authors

Venue/Journal *

Publication Date *

Citations

Volume

Issue

Page No

Upload Research Paper (PDF only)

Max size: 10MB

Keywords/Tags (Optional)

Enter keywords...

Type and press Enter, or paste comma-separated keywords

Abstract/Description

FPGA Implementation of Single Precision Floating point multiplier

Journal: International Journal of Engineering Research and Applications • January 2012

null

DOI (Optional)

Title *

URL

Article Type *

Authors

Venue/Journal *

Publication Date *

Citations

Volume

Issue

Page No

Upload Research Paper (PDF only)

Max size: 10MB

Keywords/Tags (Optional)

Enter keywords...

Type and press Enter, or paste comma-separated keywords

Abstract/Description

A Low Power Delay Buffer Using Gated Driver Tree

Journal: International Journal of Engineering Research and Applications • January 2012

null

DOI (Optional)

Title *

URL

Article Type *

Authors

Venue/Journal *

Publication Date *

Citations

Volume

Issue

Page No

Upload Research Paper (PDF only)

Max size: 10MB

Keywords/Tags (Optional)

Enter keywords...

Type and press Enter, or paste comma-separated keywords

Abstract/Description

Design and Implementation of Blowfish Crptosystem for High Speed Applications

Journal: INTERNATIONAL JOURNAL OF ADVANCES IN COMPUTER, ELECTRICAL AND ELECTRONICS ENGINEERING • December 2012

null

DOI (Optional)

Title *

URL

Article Type *

Authors

Venue/Journal *

Publication Date *

Citations

Volume

Issue

Page No

Upload Research Paper (PDF only)

Max size: 10MB

Keywords/Tags (Optional)

Enter keywords...

Type and press Enter, or paste comma-separated keywords

Abstract/Description

A New Novel Low Power Floating Point Multiplier implementation using Vedic Multiplication Techniques

Journal: International Journal of Engineering Research and Applications • August 2013

null

DOI (Optional)

Title *

URL

Article Type *

Authors

Venue/Journal *

Publication Date *

Citations

Volume

Issue

Page No

Upload Research Paper (PDF only)

Max size: 10MB

Keywords/Tags (Optional)

Enter keywords...

Type and press Enter, or paste comma-separated keywords

Abstract/Description

DOI (Optional)

Title *

URL

Article Type *

Authors

Venue/Journal *

Publication Date *

Citations

Volume

Issue

Page No

Upload Research Paper (PDF only)

Max size: 10MB

Keywords/Tags (Optional)

Enter keywords...

Type and press Enter, or paste comma-separated keywords

Abstract/Description

📢 Share this with your network Create a post to share this publication with your professional network

Add New Author

E-Mail *

Author Name (Firstname Lastname) *

Add New Organization

Organization Name *

Add New Degree Type

Degree Type *

Add New Field of Study

Field of Study *

📋 Quick Navigation

👤 About
💼 Experience
🎓 Education
📚 Publications

Followers 0

No followers yet

Following 0

Not following anyone yet

Questions I Asked 0

No questions asked yet

👤 About
💼 Experience
🎓 Education
📚 Publications

J.E.N. Abhilash

Send Message

👤 About

Skills & Expertise

Research Interests

Connect With Me

Social Links (Optional)

💼 Experience

Associate Professor

🎓 Education

J.N.T.U.University Campus,Kakinada

Sri Saradhi Institiute of Engineering and Technology, Nuzivedu

SVSR& MM Junior College, Vijayawada

DAV Public School Kondapalli,Vijayawada

Mewar University

Add New Journal

📚 Publications (8)

Add New Author

Add New Organization

Add New Degree Type

Add New Field of Study

QUICKLINKS

CONTACT US