Paper Title
Realization of cost-effective multiplier for high speed Digital Signal Processing architectures
Article Type
Research Article
Journal
International Transaction on Electronics and Communication Engineering, ASDF journal
Publication Info
Published On
December, 2014
Abstract
Veera Boopathy
"Realization of cost-effective multiplier for high speed Digital Signal Processing architectures".
International Transaction on Electronics and Communication Engineering, ASDF journal,
vol: ,
No.
Dec. 2014,
pp: ,
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