INTERPRETABLE MACHINE LEARNING FOR ROOT CAUSE ANALYSIS IN CHIP VALIDATION FAILURES ACROSS MULTI-DIE SYSTEMS
Abstract
As multi-die systems become prevalent in modern semiconductor architectures, validation complexities have increased significantly. Root cause analysis (RCA) of failures in such complex systems demands interpretable methods that ensure engineers can understand and act upon the outcomes. This paper explores how interpretable machine learning (ML) techniques—particularly decision trees, LIME, and SHAP—can be applied to RCA for validation failures in multi-die chips. We demonstrate how model explainability can support engineers in isolating faults more efficiently than traditional rule-based or black-box ML models.
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