Paper Title
Area efficient High Level Logic Synthesis Using 5-Input Majority Gate Based on Multiplexer.
Article Type
Conference Article
Journal
Proceedings of National Conference on Recent Advancements in Nanoelectronics
Publication Info
Published On
January, 1970
Abstract
D. AJITHA
"Area efficient High Level Logic Synthesis Using 5-Input Majority Gate Based on Multiplexer.".
Proceedings of National Conference on Recent Advancements in Nanoelectronics,
vol: ,
No.
Jan. 1970,
pp: ,
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