A Low Jitter Low Phase Noise Wideband Digital Phase Locked Loop in Nanometer CMOS Technology
Abstract
https://scholar9.com/publication-detail/a-low-jitter-low-phase-noise-wideband-digital-phas-21998
Details
Volume
9
Issue
3
ISSN
0976-6472
Nilesh Patel
"A Low Jitter Low Phase Noise Wideband Digital Phase Locked Loop in Nanometer CMOS Technology".
International Journal of Electronics and Communication Engineering and Technology,
vol: 9,
No. 3
Jan. 1970, https://scholar9.com/publication-detail/a-low-jitter-low-phase-noise-wideband-digital-phas-21998