Paper Title
A Low Jitter Low Phase Noise Wideband Digital Phase Locked Loop in Nanometer CMOS Technology
Authors
Publication Info
Volume: 9 | Issue: 3
Published On
January, 1970
Abstract
Nilesh Patel
"A Low Jitter Low Phase Noise Wideband Digital Phase Locked Loop in Nanometer CMOS Technology".
International Journal of Electronics and Communication Engineering and Technology,
vol: 9, No. 3 Jan. 1970, https://scholar9.com/publication-detail/a-low-jitter-low-phase-noise-wideband-digital-phas-21998
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