SA

SANTHOSH ALLEMKI

Associate Professor at Guru Nanak Institute of Technology, Ibrahimpatnam
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👤 About

Skills & Expertise

Python programming DIJANGO frame work web applications Machine Learning Signals& Systems Simulation Analysis Data Analytics cloud Antenna Design RTL GDS II Cadance Tools VLSI system design Silicon end application approach Research Methodology Machine Learning Data Science Emerging technologies IOT AIML Image processing Solar PV systems UHV Nano Fabrication VLSI DESIGN Signal Processing MATLAB Digital Image Processing LAMP Technology Electromagnetic Theory Transmission lines Waveguides PCB Design Electronic Circuits

Research Interests

Self starter Best student motivator Strong determination and dedication Good team spirit communication skills Easily adaptive quick in learning

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💼 Experience

Associate Professor

Guru Nanak Institute of Technology, Ibrahimpatnam · November 2022 - Present

Associate Professor & HOD

Sree Chaitanya Institute Of Technological Sciences · January 2018 - October 2022

Associate Professor

Sree Chaitanya College of Engineering, Karimnagar, TS · June 2011 - December 2017

Assistant Professor

Vaageswari College of Engineering · August 2006 - June 2011

🎓 Education

Masters junior college ,Karimnagar

Intermediate in M.P.C ·

Sarvodaya high school ,Karimnagar

10th in S.S.C ·

Balaji Institute of Technology & Science (BITS), Narsampet

M.Tech in DSCE ·

Omprakash Jogender Singh University, Churu

Ph.D in Electronics ·

Sindhura College Of Engineering and Technology (SIND)

B.Tech in ECE ·
Description (between 50 and 1500 characters)

🚀 Projects

Eco Antenna Sustainable Solutions for Ecosystem Monitoring in Wireless Sensor Networks
Agency Name: Science and Engineering Research Board ||

🎤 Conferences & Seminars (17)

Morphological Edge detection &corner detection algorithm using chain Encoding
Hot By · City , State , Country ·
Fault tolerant nano -memory with fault secure encoder and Decoder
Hot By · City , State , Country ·
A Novel 3 Transistor Xor Gate Based Full Adder Design For VLSI Applications
Hot By · City , State , India ·
A 12 Bit 50MSPS Low Power SAR ADC in UMC 65nm Technology
IEEE - Institute of Electrical and Electronics Engineers · City , State , India ·
DESIGN OF 2T XOR GATE BASED FULL ADDER USING GDI TECHNIQUE
IEEE Bangalore section · City , State , India · February 2017

🏆 Awards & Achievements (1)

🏆 Adarsh Vidya Saraswati Rashtriya Puraskar
Awarded by: National award of Excellence || Year: 2023

💡 Patents (4)

System Of Intelligent Broadcasting For Multiple Channels Streaming
Patent No. · Filed · Issued on
Inventors: || Category: Agricultural Sciences
description
Process for formation of capacitor structure for Nonvolatile memory on Germanium nano crystals
Patent No. · Filed · Issued on
Inventors: || Category: Agricultural Sciences
description
A Dynamic IOT based Smart Home Automation System for energy efficiency and resource management
Patent No. · Filed · Issued on
Inventors: || Category: Agricultural Sciences
description
smart device for network intrusion detection
Patent No. 6318273 · Filed · Issued on
Inventors: || Category: Architecture and design
description
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