About
I would like to be a part of an organization that would give an opportunity and provides a conductive environment for growth and development to meet the new challenges and make a positive contribution in my field.
Skills & Expertise
QCADesigner
VHDL
VERILOG
Assembly level language
8086
Tanner
Tspice
Multisim
Win XP
Win 2007
Win 2010
Research Interests
presentation skills
communication skills
Diligent worker
self-starter
consistent performer
learning
team
Connect With Me
Experience
Associate Professor
Education
J.N.T.U A
J.N.T.U.A
JNTUA College of Engineering, Ananthapuramu
Govt. Polytechnic College for Women
Projects
A New Approximation Method for Cac schemes in Cellular Mobile Networks.
A Novel On-Line Testable Reversible Adders with New Reversible Gate.
DESIGN, DEVELOPMENT & PERFORMANCE COMPARISON OF NANO CIRCUIT LIBRARIES FOR VLSI CIRCUITS USING QCA
Awards & Achievements (1)
🏆 Best Paper award
Description
Thesis Guided (9)
Design and implementation of efficient XOR gate structures using QCA.
Institution:
Smart street light controller.
Institution:
Design of 64-bit RISC processor using Verilog HDL.
Institution:
High speed modified Booth encoder multiplier for signed and unsigned numbers.
Institution:
Drive by wireless sensor networks.
Institution:
Face recognition system using Neural Networks.
Institution:
Design of parallel prefix adders.
Institution:
Customer alerts using GSM technology in prepaid electricity billing.
Institution:
Design and evaluation of majority gate based RAM cell in QCA.
Institution:
Professional Memberships (2)
Institution of Electronics and Telecommunication Engineers (IETE)
Indian Society For Technical Education ISTE
Publications (21)
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