AV

A.Vino Vilmet Rose

at R.M.D. ENGINEERING COLLEGE
, India
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👤 About

Skills & Expertise

Control System Digital System Design Digital Signal Processing Electric Circuits Measurements and Instrumentation Electronic circuits Network on chip Low power Network On chip Flexray bus MILCAN bus GALS (Globally asynchronous locally synchronous) FPGA Implementation

Research Interests

Research Writing

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💼 Experience

R.M.D. ENGINEERING COLLEGE · May 2014 - Present

Dayananda Sagar College of Engineering (DSCE) · August-09 - December-09

AMC Engineering College, Bengaluru · Jan-08 - Dec -08

Jaya Engineering College · June-02 - June-06
  • Subjects Handled: i) Control System, ii) Digital System Design, iii) Digital Signal Processing, iv) Electric Circuits, v) Measurements and Instrumentation, vi) Electronic circuits

R.M.D. ENGINEERING COLLEGE · June-06 - Jan-08

VELAMMAL Engineering College · January 2010 - June 2010

🎓 Education

College of Engineering Guindy, Anna University, Chennai.

Ph.D in · 2015

College of Engineering Guindy, Anna University, Chennai.

M.E. in Applied Electronics · 2006

St. Peters Engineering College, Chennai.

B.E. in Electrical & Electronics · 2002

TI-Matriculation School, Chennai.

XII standard in · 1998

Kendra Vidhyalaya (HVF) Avadi, Chennai.

X Standard in · 1996
Description (between 50 and 1500 characters)

🚀 Projects

Low Power Implementation of SOC
Agency Name: ||
The Network on a chip replaces the bus within a SOC with reliable low power design connectivity. It involves switching nodes using GALS (Globally asynchronous locally synchronous).It is a emerging technology for System on Chip designers. MANGO (Message passing Asynchronous network on chip providing guaranteed services through OCP interface) a GALs based architecture was implemented. The Router provides GS (guaranteed service). Each port had 8 VC (virtual channels), through which data is sent through links in the form of flits. The network adapter provides the synchronization between clocked IP core and asynchronous network. It applies significant power reduction methods.
Feasibility Exploration of Multibus Architecture for AFV applications
Agency Name: CVRDE, Avadi Chennai || June-2011 - March 2013
The project dealt with the development of multibus architecture for AVF applications. The architecture involved Flexray and MILCAN buses. The Flexray bus architecture was studied using vendor boards and similarly, the MILCAN bus implementation was carried out using Vector Boards. An in-house development board was developed which was used to integrate both the buses.

📚 Publications (6)

Journal: International Journal of Engineering Science and Innovative Technology • September-2014
Journal: Information-An International Interdisciplinary Journal •
Journal: International Review on Computers and Software (I.RE.CO.S.) •
Journal: European Journal of Scientific Research •
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